Adoption of Cadence Encounter RTL Compiler Accelerates in Japan; Cadence Global Synthesis Gets Support from ASIC Customer and Leading ASIC Vendors for Enabling Quality of Silicon (QoS)
SAN JOSE, Calif.—(BUSINESS WIRE)—July 20, 2005—
Cadence Design Systems, Inc. (NYSE:CDN) (Nasdaq:CDN)
today announced that Canon, Inc. has adopted Encounter(TM) RTL
Compiler for its ASIC designs, further increasing momentum of RTL
Compiler synthesis in Japan. The improvements in area, performance and
power delivered by Encounter RTL Compiler make designs more
competitive, and these benefits have accelerated its adoption by
customers worldwide. During the last 12 months, over 80 new customers
have adopted Encounter RTL Compiler.
"The evaluations of our previous ASIC designs using Encounter RTL
Compiler have shown us consistent benefits," said Yasuhiro Tani,
senior general manager, SOC Design Center, Platform Technology
Development Headquarters at Canon, Japan. "We have adopted Encounter
RTL Compiler for future tapeouts because of its proven ability to
increase chip performance, reduce power, reduce turnaround time and
increase productivity. We will now make support for Encounter RTL
Compiler a requirement for our ASIC vendors."
Encounter RTL Compiler global synthesis has proven through
tapeouts to deliver improved performance, smaller die sizes, lower
power consumption, and faster design closure through place and route.
This ability to produce smaller, faster and cooler chips in less time
has increased customer competitiveness and reduced overall costs.
In order to support increased demand and usage of RTL Compiler by
customers, a number of leading ASIC vendors have qualified Encounter
RTL compiler for their customers.
"The benefits of the RTL Compiler's global synthesis technology
will allow designers to significantly reduce design cost and improve
time to market," said Satoshi Andou, general manager, Design
Methodology Development Division, Electronic Devices Business Group at
Fujitsu. "Fujitsu will support Encounter RTL Compiler for our internal
and external ASIC customers."
"As a result of increasing customer usage and its ability to
produce high-quality netlists for implementation, NEC Electronics has
adopted Encounter RTL Compiler as part of our ASIC design flow and
will support Encounter RTL Compiler for synthesis," said Kazu Yamada,
associate vice president, Technology Foundation Development Operation
Unit from NEC Electronics. "We want to ensure that our customers are
enabled to take the most out of our ASIC offering to achieve their
design goals in the shortest time possible."
"Our evaluation of Cadence Encounter RTL Compiler for synthesis of
ASIC designs has demonstrated to us its value for producing optimized
netlists for large designs and meet design goals for performance and
die size," said Shin-ichi Imai, senior manager, System LSI Design
Dept. System LSI Division I at Toshiba. "As a result, we will support
RTL Compiler for production tapeouts."
Interconnect related parameters in nanometer designs require a new
metric for synthesis results that includes performance, area, and
power measured with wires. Cadence defines this as Quality of Silicon
(QoS). Cadence Encounter RTL Compiler's global synthesis enables
designers to achieve the highest QoS in less time and with less
effort.
"Achieving this level of customer adoption in such a short time is
a testament to the superiority of Cadence's patented global synthesis
approach," said Dr. Chi-Ping Hsu, corporate vice president at Cadence.
"Encounter RTL Compiler is now being successfully used in production
by companies throughout the world to achieve a competitive advantage
via the fastest path to the highest QoS."
About Cadence
Cadence enables global electronic-design innovation and plays an
essential role in the creation of today's integrated circuits and
electronics. Customers use Cadence software and hardware,
methodologies, and services to design and verify advanced
semiconductors, consumer electronics, networking and
telecommunications equipment, and computer systems. Cadence reported
2004 revenues of approximately $1.2 billion, and has approximately
4,700 employees. The company is headquartered in San Jose, Calif.,
with sales offices, design centers, and research facilities around the
world to serve the global electronics industry. More information about
the company, its products, and services is available at
www.cadence.com.
Cadence and the Cadence logo are registered trademarks, and
Encounter is a trademark of Cadence Design Systems, Inc. All other
trademarks are the property of their respective owners.
Contact:
Cadence Design Systems, Inc.
Michael Fournell, 408-428-5135
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